products > product profiles > ZL50111
ZL50111 1024 Channel (32 T1/E1, 2 T3/E3) CESoP Processor with triple Ethernet interface
| Product Status - Production |
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The ZL50111 is a highly functional TDM to Packet bridging device that provides structured and unstructured circuit emulation services (CES) for T1/E1 streams across a packet network based on Ethernet technology. The ZL50111 is capable of assembling user-defined packets of TDM traffic from the TDM access interface and transmitting them from the Ethernet interfaces using a variety of protocols such as Ethernet VLAN's, IP (both versions 4 and 6) and MPLS. The device also supports four different classes of service on packet egress, allowing priority treatment of TDM-based traffic. The circuit emulation features in the ZL50111 comply with the relevant standards currently being developed within the IETF's PWE3 working group. The ZL50111 incorporates a range of powerful clock recovery mechanisms and sufficient on-chip memory that external memory is not required in most applications. This reduces system costs and simplifies the design.
Features
- 1024 bi-directional 64 kbps channels in structured, synchronous CES
- 32 T1/E1 or 2 T3/E3 unstructured, asynchronous CES, with integral per stream clock recovery
- Interface either directly to LIU, via a framer, or via a TDM backplane
- Dual reference Stratum 3, 4 and 4E PLL for synchronous operation
- 3 x 100 Mbps MII or Dual Redundant 1000 Mbps GMII/PCS(TBI) Ethernet Interfaces
- Flexible 32 bit host CPU interface (Motorola PowerQUICC II compatible)
- On-chip packet memory for self-contained operation, with buffer depths of over 16 ms
- Flexible, multi-protocol packet encapsulation
- Packet sequencing to allow lost packet detection
- Four classes of service with programmable priority mechanisms (WFQ and SP)
- Classification of incoming packets at layers 2, 3, 4, and 5
Typical Applications
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Leased Line support over packet network
- Multi-Tenant Unit access concentration
- Packet switched backplane applications
- TDM backplane extension / expansion
Product Information
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Design Information
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Models
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Product Availability and Packaging
| Ordering Part No. |
Package Type |
No. of Pins |
Lead-free Option |
Shipping Option |
Lead Time (Weeks) |
Status |
 |
| ZL50111GAG |
PBGA |
552 |
|
Trays. Bake & Drypack |
6-8 weeks |
Production |
| ZL50111GAG2 |
PBGA |
552 |
Pb-free-Tin/Silver/Copper |
Trays. Bake & Drypack |
6-8 weeks |
Production |
Product Lead-Times when quoted are not guaranteed and are provided as a
general guideline only; they may be varied from time to time without
notice. Updated estimates or actual schedule commit dates will be provided
at the time of order placement with Zarlink or its distributor.
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Related Products
| Part Number | Description |
 |
ZL50110 |
256 Channel (8 T1/E1) CESoP Processor with Dual Ethernet Interface |
ZL50114 |
128 Channel (4 T1/E1) CESoP Processor with Dual Ethernet Interface |
ZL50115 |
32 Channel (1 T1/E1) CESoP Processor with single Ethernet interface |
ZL50116 |
64 Channel (2 T1/E1) CESoP Processor with single Ethernet interface |
ZL50117 |
128 Channel (4 T1/E1, 1 T3/E3/STS-1) CESoP Processor with single Ethernet interface |
ZL50118 |
32 Channel (1 T1/E1) CESoP Processor with dual Ethernet interface |
ZL50119 |
64 Channel (2 T1/E1) CESoP Processor with dual Ethernet interface |
ZL50120 |
128 Channel (4 T1/E1, 1 T3/E3/STS-1) CESoP Processor with dual Ethernet interface |
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