Zarlink Semiconductor

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Zarlink Analog Foundry Releases Improvement to WPX and WPY Power Management Process Technologies

OTTAWA, CANADA, November 2, 2006 – Zarlink Semiconductor (NYSE/TSX:ZL) today announced the release of an enhanced WPX and WPY process with a high beta early voltage lateral PNP transistor. The improved capabilities of the lateral PNP transistor allow designers to use the WPX and WPY process technologies in a wider range of power management applications requiring both higher operating power and temperature performance.

“We have developed an improved transistor with up to twice the beta VA product and more consistent voltage output over a range of input currents,” said Dr. Peter Osborne, chief technology officer, Zarlink Analog Foundry. “This power management performance enhancement is in direct response to requirements from customers who are using our process technologies in increasingly demanding applications.”

Building on its expertise in RF process technology, the Zarlink Analog Foundry has developed a power management process with greater than 20 V (volt) capability at a transistor transit frequency of 5 GHz. Zarlink developed the WP series fully featured 15-layer process specifically for industrial power management applications, including dc-dc power bricks, mobile telephone battery power management and all linear power management applications.

Zarlink Analog Foundry will be discussing its improved WPX and WPY process technologies at the 2006 FSA Suppliers Expo and Conference in Taipei, Taiwan on Wednesday, November 8th (Booth#A36).

WPX and WPY process technologies

The WP series is a versatile low capacitance linear bipolar process providing excellent functionality at low cost. Features such as high-value poly resistors and nitride capacitors and two-layer metal allow low current circuits to be built with high packing densities. The technologies are suitable for greater than 20 V and 22 V power management applications. The current range of onboard components, including Schottky diodes, high-value capacitors, resistors, thick metal and improved lateral PNP transistors, combined with fast, high-performance NPN transistors are all designed to provide characteristically low leakage and flicker noise.

The WP series process technologies are supported by a comprehensive design kit and technical support service. The Foundry’s Design Services group is a broad-based team with significant experience and expertise in IC design support, including a comprehensive autographics (chip finishing and tape out) service and ESD (electrostatic discharge) consultation. The team develops and supports front-end to back-end design capabilities and models that enables IC design on industry-standard design tools. A complete “plug and play” design environment will also be offered, comprising schematic capture, simulation and layout, together with a comprehensive DRC and LVS design verification suite.

Zarlink’s WP-process technology is available for low-cost prototyping using a multi-project wafer processing service. For further information, visit: http://foundry.zarlink.com or contact Steve Mace, technical marketing, Zarlink Analog Foundry at steve.mace@zarlink.com.

About Zarlink Semiconductor

For over 30 years, Zarlink Semiconductor has delivered semiconductor solutions that drive the capabilities of voice, enterprise, broadband and wireless communications. The Company’s success is built on its technology strengths including voice and data networks, optoelectronics and ultra low-power communications. For more information, visit www.zarlink.com.

Shareholders and other individuals wishing to receive, free of charge, copies of the reports filed with the U.S. Securities and Exchange Commission and Regulatory Authorities, should visit the Company’s web site at www.zarlink.com or contact Investor Relations.

Certain statements in this press release constitute forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995. Such forward-looking statements involve known and unknown risks, uncertainties, and other factors which may cause the actual results, performance or achievements of the Company to be materially different from any future results, performance, or achievements expressed or implied by such forward-looking statements. Such risks, uncertainties and assumptions include, among others, the following: rapid technological developments and changes; our ability to continue to operate profitably and generate positive cash flows in the future; our dependence on our foundry suppliers and third-party subcontractors; order cancellations and deferrals by our customers; increasing price and product competition; and other factors referenced in our Annual Report on Form 20-F. Investors are encouraged to consider the risks detailed in this filing.

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For further information:

Edward Goffin
Media Relations
613 270-7112
edward.goffin@zarlink.com

Mike McGinn
Investor Relations
613 270-7210
mike.mcginn@zarlink.com


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